2 RISC-V汇编语言 第二章单元测验
1、 What is the content of stack pointer (SP)?
A:address of the current instruction
B:address of the next instruction
C:address of the top element of the stack
D:size of the stack
答案: address of the top element of the stack
2、 Which of the following program is used to translate assembly language into machine language?
A:Compiler
B: Assembler
C:Linker
D:Loader
答案: Assembler
3、 Choose one of the following memory segments where the local variables data could be located.
A:Text
B:Static
C:Heap
D:Stack
答案: Stack
4、 For the following C statement,A = C[0] << 4;write a minimal sequence of RISC-V assembly instructions that performs the identical operation. Assume x6 = A, and x17 is the base address of C.
A:ld x17, 0(x6)slli x6, x6, 4
B:ld x6, 0(x17)slli x6, x6, 4
C:sd x17, 0(x6)slli x6, x6, 4
D:sd x6, 0(x17)slli x6, x6, 4
答案: ld x6, 0(x17)slli x6, x6, 4
5、 For contants, choose one or more of the following memory segments where the data could be located:
A:text
B:static
C:heap
D:stack
答案: text;
static;
stack
6、 Consider the following RISC-V loop:LOOP: beq x6, x0, DONEaddi x6, x6, -1addi x5, x5, 2jal x0, LOOPDONE:Assume that the register x6 is initialized to the value 5. Assuming the x5 is initially zero, the final value in register x5 is ( ). (Use the decimal format)
答案: 10
7、 Consider the following RISC-V instructions:bge x5, x0, ELSEjal x0, DONEELSE: ori x6, x0, 2DONE:Assume x5 holds the value 0x00000000001010000. The final value of x6 is ( ). (Use the decimal format)
答案: 2
8、 Assume x5 = 0x00000000AAAAAAAA, what is the value of x7 for the following sequence of instructions?srli x7, x5, 3andi x7, x7, 0xFEF0x______ (Omit the upper bits if they are zeros)
答案: 545
9、 Assume x6 = 0x1234567812345678, what is the value of x7 for the following sequence of instructions?slli x7, x6, 80x______ (Omit the upper bits if they are zeros)
答案: 3456781234567800
10、 Two’s complement in 8 bits for -128 is ( ). (Use the binary format)
答案: 10000000
3 RISC-V指令表示 第三章单元测验
1、 What is range of 32-bit instructions that can be reached from the current PC using a B-Format branch instruction?
A:
B:
C:
D:
答案:
2、 What is the range of 32-bit instructions that can be reached from the current PC using a J-Format jump instruction?
A:
B:
C:
D:
答案:
3、 What is the RISC-V assembly code for the binary:0100 1010 0101 0011 1010 1000 0010 0011
A:sw t0, 300(t2)
B:sw t0,1200(t2)
C:sw t2, 300(t0)
D:sw t2, 1200(t0)
答案: sw t0,1200(t2)
4、 Assume that we would like to expand the RISC-V register file to 128 registers, how many bits would the length of the R-type instruction be?
A:32 bits
B:34 bits
C:36 bits
D:38 bits
答案: 38 bits
5、 Consider a proposed new instruction named “rpt”. This instruction combines a loop’s condition check and counter decrement into a single instruction. For example “rpt x39” would do the following:if (x29 > 0){ x29 = x29 – 1;}If this instruction were to be added to the RISC-V instruction set, what is the most appropriate instruction format?
A:R-Format
B:I-Format
C:B-Format
D:J-Format
答案: B-Format
6、 What should be considered when designing the instruction format?
A:The number and types of instructions required to support.
B:The range of accessible main memory space.
C:The number of general-purpose registers available for programming.
D:The bit width of general-purpose registers.
答案: The number and types of instructions required to support.;
The range of accessible main memory space.;
The number of general-purpose registers available for programming.
7、 Given the following RISC-V codes (and instruction addresses), fill in the following blanks with their machine codes in binary, and the value of ra in hexadecimal.0x302cff00: loop: add t1, t2, t0 machine code1:__0x302cff04: jal ra, foo machine code2:_0x302cff08: bne t1, zero, loop machine code3:…0x302cff2c: foo: jr ra ra=0xmachine code1=______(binary)
答案: 00000000010100111000001100110011
8、 For the RISC-V codes in question 4, machine code2=____(binary)
答案: 00000010100000000000000011101111
9、 For the RISC-V codes in question 4, machine code3=____(binary)
答案: 11111110000000110001110011100011
10、 For the RISC-V codes in question 4, ra=0x____(hexadecimal)
答案: (以下答案任选其一都对)302cff08;
302CFF08
第四章、RISC-V数据通路 第四章单元测验
1、 From the perspective of the CPU hardware model, which of the following are definitely not the basic components of the CPU?
A:ALU
B:Main memory
C:Cache
D:Controller
答案: Main memory
2、 Single-cycle RISC-V datapath cannot complete which of the following operations in one clock cycle.
A:Reading data from and writing data to data memory
B:ALU computation and writing data to the register file
C:Updating PC and writing data to data memory
D:Reading data from register file, ALU computation and writing data to data memory
答案: Reading data from and writing data to data memory
3、 The bit width of PC is determined by ( ).
A:Memory word length
B:Memory capacity
C:Instruction word length
D:Bit width of general-purpose registers
答案: Memory capacity
4、 Problem in this exercise assume that the logic blocks used to implement a processor’s complete datapath have the following latencies:
“Register read” is the time needed after the rising clock edge for the new register value to appear on the output. This value applies to the PC only. “Register setup” is the amount of time a register’s data input must be stable before the rising edge of the clock. This value applies to both the PC and Register File.Q1: What is the latency of an R-type instruction?____ ps ( number only )
答案: 700
5、 For conditions in question 4.Q2: What is the latency of lw instruction?____ ps (number only )
答案: 950
6、 For conditions in question 4.Q3: What is the latency of sw instruction?____ ps ( number only )
答案: 905
7、 For conditions in question 4.Q4: What is the latency of beq instruction?____ ps ( number only )
8、 For conditions in question 4.Q5: What is the latency of I-type instruction?____ ps ( number only )
答案: 700
9、 For conditions in question 4.Q6: What is the minimum clock period for this CPU?____ ps ( number only )
答案: 950
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